Invention Grant
- Patent Title: Executing processor instructions using minimal dependency queue
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Application No.: US15823632Application Date: 2017-11-28
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Publication No.: US10678549B2Publication Date: 2020-06-09
- Inventor: Avraham Ayzenfeld , Eyal Naor , Amir Turi
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LP
- Agent William Kinnaman
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/312 ; G06F9/38

Abstract:
Examples of techniques for executing instructions out of order are described herein. An example computer-implemented method includes receiving, via a processor, a plurality of instructions to be executed. The method includes sending, via the processor, an instruction to a minimal dependency queue in response to detecting the instruction includes a minimally dependent instruction. The method also includes selecting, via the processor, an instruction from a set of instructions that are eligible to be executed based on a scheme. The method further includes executing, via the processor, the instruction.
Public/Granted literature
- US20190163481A1 EXECUTING PROCESSOR INSTRUCTIONS USING MINIMAL DEPENDENCY QUEUE Public/Granted day:2019-05-30
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