Intrusion-protected memory-containing assembly including a substrate, a data storage component and processor on the substrate, and a chassis intrusion detector assembly around the substrate. The chassis intrusion detector assembly includes a first plastic film, a mesh including conductor wires arranged on the first plastic film, and a second plastic film covering the mesh. The conductor wires are connected together in a single circuit with the processor to form a single transmission line. The second plastic film has sealed edges integrated with the mesh such that the edges are inseparable without breaking one of the conductor wires of the mesh. The processor takes action to prevent access to data in the data storage component upon detecting a variance in current through or impedance of the transmission line defined by the conductor wires caused by breaking of one of the conductor wires, e.g., causes the data storage component to self-destruct.