Invention Grant
- Patent Title: Vertical transistor with trench gate insulator having varying thickness
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Application No.: US16441534Application Date: 2019-06-14
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Publication No.: US10679857B2Publication Date: 2020-06-09
- Inventor: Johannes Georg Laven , Anton Mauder , Hans-Joachim Schulze , Werner Schustereder
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Dicke, Billig & Czaja, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1753cce2
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L21/28 ; H01L29/40 ; H01L29/66 ; H01L29/739 ; H01L21/311 ; H01L21/3213 ; H01L29/78 ; H01L37/00 ; H01L29/04 ; H01L21/265
Abstract:
A semiconductor device and method is disclosed. In one example, the method for forming a semiconductor device includes forming a trench extending from a front side surface of a semiconductor substrate into the semiconductor substrate. The method includes forming of material to be structured inside the trench. Material to be structured is irradiated with a tilted reactive ion beam at a non-orthogonal angle with respect to the front side surface such that an undesired portion of the material to be structured is removed due to the irradiation with the tilted reactive ion beam while an irradiation of another portion of the material to be structured is masked by an edge of the trench.
Public/Granted literature
- US20190295848A1 METHODS FOR FORMING A SEMICONDUCTOR DEVICE USING TILTED REACTIVE ION BEAM Public/Granted day:2019-09-26
Information query
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