Invention Grant
- Patent Title: Interconnect structure for semiconductor package and method of fabricating the interconnect structure
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Application No.: US14622484Application Date: 2015-02-13
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Publication No.: US10679866B2Publication Date: 2020-06-09
- Inventor: Chien-Ling Hwang , Bor-Ping Jang , Chung-Shi Liu , Hsin-Hung Liao , Ying-Jui Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/482 ; H01L23/31 ; H01L23/498 ; H01L21/48 ; H01L21/60 ; H01L21/603 ; H01L23/538
Abstract:
A semiconductor package includes a carrier, at least and adhesive portion, a plurality of micro pins and a die. The carrier has a first surface and second surface opposite to the first surface. The adhesive portion is disposed on the first surface, and the plurality of the micro pins is disposed in the adhesive portions. The die is disposed on the remaining adhesive portion free of the micro pins.
Public/Granted literature
- US20160240451A1 INTERCONNECT STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE INTERCONNECT STRUCTURE Public/Granted day:2016-08-18
Information query
IPC分类:
