Invention Grant
- Patent Title: Package with thinned substrate
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Application No.: US16048960Application Date: 2018-07-30
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Publication No.: US10679968B2Publication Date: 2020-06-09
- Inventor: Chen-Hua Yu , Chung-Hao Tsai , Chuei-Tang Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/56 ; H01L21/48 ; H01L23/498 ; H01L23/00 ; H01L25/00 ; H01L25/10 ; H01L23/31

Abstract:
A package includes a substrate, an Under-Bump Metallurgy (UBM) penetrating through the substrate, a solder region over and contacting the UBM, and an interconnect structure underlying the substrate. The interconnect structure is electrically coupled to the solder region through the UBM. A device die is underlying and bonded to the interconnect structure. The device die is electrically coupled to the solder region through the UBM and the interconnect structure. An encapsulating material encapsulates the device die therein.
Public/Granted literature
- US20180337159A1 Package with Thinned Substrate Public/Granted day:2018-11-22
Information query
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