Invention Grant
- Patent Title: Staircase structure for memory device
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Application No.: US16126956Application Date: 2018-09-10
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Publication No.: US10680003B2Publication Date: 2020-06-09
- Inventor: Zhenyu Lu , Jun Chen , Xiaowang Dai , Jifeng Zhu , Qian Tao , Yu Ru Huang , Si Ping Hu , Lan Yao , Li Hong Xiao , A Man Zheng , Kun Bao , Haohao Yang
- Applicant: Yangtze Memory Technologies Co., Ltd.
- Applicant Address: CN Wuhan, Hubei
- Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee Address: CN Wuhan, Hubei
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@6015b57b
- Main IPC: H01L27/11524
- IPC: H01L27/11524 ; H01L27/11582 ; H01L21/027 ; H01L27/1157 ; H01L27/11575 ; H01L21/311 ; H01L27/11529
Abstract:
A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.
Public/Granted literature
- US20190081070A1 STAIRCASE STRUCTURE FOR MEMORY DEVICE Public/Granted day:2019-03-14
Information query
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