An array substrate comprises a substrate including a displaying area and a connecting layout area disposed on the periphery of the displaying area, a plurality of thin film transistors, a plurality of sub-pixels and a plurality of signal lines disposed on the displaying area. The sub-pixels are electrically coupled to the plurality of thin film transistors respectively, the thin film transistors are electrically coupled to the plurality of signal lines respectively, and a plurality of input interfaces of the plurality of signal lines are disposed on the connecting layout area. Further, a driving module is disposed on the connecting layout area and the driving module includes a plurality of output interfaces. Moreover, a plurality of connecting lines are disposed between the plurality of input interfaces and the plurality of output interfaces and configured to electrically couple the plurality of input interfaces and the plurality of output interfaces respectively.