Invention Grant
- Patent Title: Field structure and methodology
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Application No.: US16026290Application Date: 2018-07-03
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Publication No.: US10680100B2Publication Date: 2020-06-09
- Inventor: Po-Chih Su , Hsueh-Liang Chou , Ruey-Hsin Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/765 ; H01L29/66 ; H01L29/40

Abstract:
The present disclosure relates to a high voltage transistor device having a field structure that includes at least one conduction unit, and a method of formation. In some embodiments, the high voltage transistor device has a gate electrode disposed over a substrate between a source region and a drain region located within the substrate. A dielectric layer laterally extends from over the gate electrode to over a drift region between the gate electrode and the drain region. A field structure is located within the first ILD layer. The field structure includes a conduction unit having a vertically elongated shape and vertically extending from a top surface of the dielectric layer and a top surface of the first ILD layer.
Public/Granted literature
- US20200013888A1 FIELD STRUCTURE AND METHODOLOGY Public/Granted day:2020-01-09
Information query
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