Invention Grant
- Patent Title: Bias circuit for high efficiency complimentary metal oxide semiconductor (CMOS) power amplifiers
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Application No.: US16042782Application Date: 2018-07-23
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Publication No.: US10680564B2Publication Date: 2020-06-09
- Inventor: Mohamed Moussa Ramadan Esmael , Mohamed Ahmed Youssef Abdalla
- Applicant: Analog Devices Global Unlimited Company
- Applicant Address: BM Hamilton
- Assignee: Analog Devices Global Unlimited Company
- Current Assignee: Analog Devices Global Unlimited Company
- Current Assignee Address: BM Hamilton
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H03F3/04
- IPC: H03F3/04 ; H03F3/21 ; H03F1/32 ; H03F3/19
Abstract:
Aspects of this disclosure relate to an adaptive biasing circuit for a power amplifier. The adaptive biasing circuit can include a shunt resistor arrangement and/or a floating gate linearizer arrangement.
Public/Granted literature
- US20200028477A1 BIAS CIRCUIT FOR HIGH EFFICIENCY COMPLIMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) POWER AMPLIFIERS Public/Granted day:2020-01-23
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