A duty cycle conversion circuit portion comprises N inverters, wherein N is an integer greater than two. The duty cycle conversion circuit is arranged to receive N input signals each having a duty cycle between 1/N and 2/N. Each of the N input signals is applied to a respective input terminal of one of the N inverters such that each inverter receives a different input signal. Each of the N input signals is applied to a respective power terminal of one of the N inverters such that each inverter is powered by a different input signal. Each inverter receives different input signal at its respective input terminal to the input signal applied to its respective power terminal.