Invention Grant
- Patent Title: Programmable on-die termination timing in a multi-rank system
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Application No.: US16146326Application Date: 2018-09-28
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Publication No.: US10680613B2Publication Date: 2020-06-09
- Inventor: Kuljit S. Bains , Alexey Kostinsky , Nadav Bonen
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: H03K19/0175
- IPC: H03K19/0175 ; G06F3/06 ; G06F13/16

Abstract:
On-die termination (ODT) control enables programmable ODT latency settings. A memory device can couple to an associated memory controller via one or more buses shared by multiple memory devices organized ranks of memory. The memory controller generates a memory access command for a target rank. In response to the command, memory devices can selectively engage ODT for the memory access operation based on being in the target rank or a non-target rank, and based on whether the access command includes a Read or a Write. The memory device can engage ODT in accordance with a programmable ODT latency setting. The programmable ODT latency setting can set different ODT timing values for Read and Write transactions.
Public/Granted literature
- US20190036531A1 PROGRAMMABLE ON-DIE TERMINATION TIMING IN A MULTI-RANK SYSTEM Public/Granted day:2019-01-31
Information query
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