Invention Grant
- Patent Title: Method for correcting solder bump
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Application No.: US16062853Application Date: 2016-12-15
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Publication No.: US10681822B2Publication Date: 2020-06-09
- Inventor: Hideki Nakamura
- Applicant: SENJU METAL INDUSTRY CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: SENJU METAL INDUSTRY CO., LTD.
- Current Assignee: SENJU METAL INDUSTRY CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2beebba6
- International Application: PCT/JP2016/087372 WO 20161215
- International Announcement: WO2017/104746 WO 20170622
- Main IPC: B23K3/00
- IPC: B23K3/00 ; H05K3/34 ; H01L23/00 ; B23K3/06 ; H05K3/00

Abstract:
A pattern formed on a silicon wafer is fine so that solder bumps formed on the silicon wafer are also fine and hence, when a failure occurs, the failure cannot be corrected so that an entire silicon wafer as a workpiece is discarded. Provided is a correction method where, on solder bumps formed on the silicon wafer, a mask in which holes are formed with the same pattern as the solder bumps is placed so as to cover the solder bumps and, thereafter, molten solder is caused to come into contact with the solder bumps through the mask thus filling hole portions of the mask with the molten solder.
Public/Granted literature
- US20190132960A1 SOLDER BUMP CORRECTION METHOD Public/Granted day:2019-05-02
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