Invention Grant
- Patent Title: Semiconductor chip package with resilient conductive paste post and fabrication method thereof
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Application No.: US15701456Application Date: 2017-09-12
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Publication No.: US10685943B2Publication Date: 2020-06-16
- Inventor: Shiann-Tsong Tsai , Hsueh-Te Wang
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MediaTek Inc.
- Current Assignee: MediaTek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: Wolf, Greenfield & Sacks, P.C.
- Main IPC: H01L25/16
- IPC: H01L25/16 ; H01L23/29 ; H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L23/538 ; H01L21/48 ; H01L23/31 ; H01L23/495

Abstract:
A semiconductor chip package includes a substrate; a semiconductor die mounted on the substrate, wherein the semiconductor die comprises a bond pad disposed on an active surface of the semiconductor die, and a passivation layer covering perimeter of the bond pad, wherein a bond pad opening in the passivation layer exposes a central area of the bond pad; a conductive paste post printed on the exposed central area of the bond pad; and a bonding wire secured to a top surface of the conductive paste post. The conductive paste post comprises copper paste.
Public/Granted literature
- US20180006002A1 SEMICONDUCTOR CHIP PACKAGE AND FABRICATION METHOD THEREOF Public/Granted day:2018-01-04
Information query
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