Invention Grant
- Patent Title: System interconnect and system on chip having the same
-
Application No.: US15821406Application Date: 2017-11-22
-
Publication No.: US10691527B2Publication Date: 2020-06-23
- Inventor: Sueng-Chul Ryu , Bo-Eok Seo
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@140328fb
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F13/364 ; G06F13/42 ; G06F11/34 ; G06F11/30

Abstract:
A system on chip (SoC) includes a bus matrix configured to connect a plurality of functional blocks. A monitoring unit is configured to monitor whether a transaction between the functional blocks has a hang or stall and distinguish a functional block that caused a hang or stall from among the functional blocks. A recovery signal generation unit is configured to provide a recovery signal for releasing the hang or stall to at least one of the functional blocks based on the distinguishing by the monitoring unit.
Public/Granted literature
- US20180157553A1 SYSTEM INTERCONNECT AND SYSTEM ON CHIP HAVING THE SAME Public/Granted day:2018-06-07
Information query