Invention Grant
- Patent Title: Replacement policies for a hybrid hierarchical cache
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Application No.: US16113174Application Date: 2018-08-27
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Publication No.: US10691617B2Publication Date: 2020-06-23
- Inventor: Abhishek R. Appu , Joydeep Ray , James A. Valerio , Altug Koker , Prasoonkumar P. Surti , Balaji Vembu , Wenyin Fu , Bhushan M. Borole , Kamal Sinha
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F12/12
- IPC: G06F12/12 ; G06F12/128 ; G06F12/0811 ; G06F13/40 ; G06T1/60 ; G06F12/0897 ; G06F12/084

Abstract:
A hybrid hierarchical cache is implemented at the same level in the access pipeline, to get the faster access behavior of a smaller cache and, at the same time, a higher hit rate at lower power for a larger cache, in some embodiments. A split cache at the same level in the access pipeline includes two caches that work together. In the hybrid, split, low level cache (e.g., L1) evictions are coordinated locally between the two L1 portions, and on a miss to both L1 portions, a line is allocated from a larger L2 cache to the smallest L1 cache.
Public/Granted literature
- US20190018799A1 Replacement Policies for a Hybrid Hierarchical Cache Public/Granted day:2019-01-17
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