Invention Grant
- Patent Title: Gate isolation plugs structure and method
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Application No.: US16229908Application Date: 2018-12-21
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Publication No.: US10692723B2Publication Date: 2020-06-23
- Inventor: Wen-Shuo Hsieh , Shih-Chang Tsai , Chih-Han Lin , Te-Yung Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/66 ; H01L29/78 ; H01L21/8234 ; H01L21/8238

Abstract:
A method of forming a gate isolation plug for FinFETs includes forming an elongated gate, forming first and second spacers in contact with first and second sidewalls of the elongated gate, separating the elongated gate into first and second gate portions using first and second etching steps, and forming a gate isolation plug between the first and second gate portions, wherein a length of the gate isolation plug is greater than a length of either of the first or second gate portions.
Public/Granted literature
- US20190221431A1 Gate Isolation Plugs Structure and Method Public/Granted day:2019-07-18
Information query
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