Invention Grant
- Patent Title: Semiconductor devices having through-stack interconnects for facilitating connectivity testing
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Application No.: US16020140Application Date: 2018-06-27
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Publication No.: US10692841B2Publication Date: 2020-06-23
- Inventor: Christian N. Mohr , Scott E. Smith
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01R31/26 ; H01L25/065 ; G01R27/14 ; H01L23/538

Abstract:
Semiconductor devices having through-stack interconnects for facilitating connectivity testing, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a stack of semiconductor dies and a plurality of through-stack interconnects extending through the stack to electrically couple the semiconductor dies. The interconnects include functional interconnects and at least one test interconnect. The test interconnect is positioned in a portion of the stack more prone to connectivity defects than the functional interconnects. Accordingly, testing the connectivity of the test interconnect can provide an indication of the connectivity of the functional interconnects.
Public/Granted literature
- US20200006291A1 SEMICONDUCTOR DEVICES HAVING THROUGH-STACK INTERCONNECTS FOR FACILITATING CONNECTIVITY TESTING Public/Granted day:2020-01-02
Information query
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