Invention Grant
- Patent Title: Circuit and method for digital-to-analog conversion using three-level cells
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Application No.: US16191584Application Date: 2018-11-15
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Publication No.: US10693489B2Publication Date: 2020-06-23
- Inventor: Hyung-Dong Roh , Jae-Keun Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2ee302cf
- Main IPC: H03M1/74
- IPC: H03M1/74 ; H03M3/00 ; H03M1/06

Abstract:
A circuit for digital-to-analog conversion using a plurality of 3-level cells includes a circuit for digital-to-analog conversion using a plurality of 3-level cells mutually independently providing positive electricity, providing negative electricity, or floating. The circuit including a preprocess circuit and a shift circuit. The preprocess circuit is configured to receive thermometer code data generated from signed binary data and generate a shift count for shifting a cell pointer pointing to one of the plurality of 3-level cells for dynamic element matching (DEM) from the thermometer code data. The shift circuit is configured to store the cell pointer and shift the stored cell pointer according to the shift count. The shifted cell pointer is shifted in proportion to an absolute value of the binary data in a direction depending on a sign of the binary data.
Public/Granted literature
- US20190229748A1 CIRCUIT AND METHOD FOR DIGITAL-TO-ANALOG CONVERSION USING THREE-LEVEL CELLS Public/Granted day:2019-07-25
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