Invention Grant
- Patent Title: Test key layout and method of monitoring pattern misalignments using test keys
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Application No.: US16019555Application Date: 2018-06-27
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Publication No.: US10698323B2Publication Date: 2020-06-30
- Inventor: Tsai-Yu Huang
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Agent Winston Hsu
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@53d62573
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G03F7/20
Abstract:
A set of test key layout including multiple test keys and method of monitoring layout pattern misalignments using the test keys is provided. Each test key is composed of a testing electrode, an operating voltage (Vdd) line and a grounding voltage (Vss) line, wherein the patterns of test keys are defined by an overlapped portion of a first exposure pattern and a second exposure pattern, and the position of testing electrode is shifted sequentially in one direction in order of the test keys.
Public/Granted literature
- US20190051567A1 TEST KEY LAYOUT AND METHOD OF MONITORING PATTERN MISALIGNMENTS USING TEST KEYS Public/Granted day:2019-02-14
Information query
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