Invention Grant
- Patent Title: Adaptive routing to avoid non-repairable memory and logic defects on automata processor
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Application No.: US16197007Application Date: 2018-11-20
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Publication No.: US10698697B2Publication Date: 2020-06-30
- Inventor: Dale Hiscock
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F9/4401 ; G06F13/42 ; G06F15/78

Abstract:
Systems and methods for utilizing a defect map to configure an automata processor in order to avoid defects when configuring the automata processor. A system includes automata processor having a state machine lattice. The system also includes a non-volatile memory having a defect map stored thereon and indicating logical defects found on the automata processor. By including the defect map, a compiler may access the defect map to map out defects in the automata processor during configuring to avoid such defects.
Public/Granted literature
- US20190087201A1 ADAPTIVE ROUTING TO AVOID NON-REPAIRABLE MEMORY AND LOGIC DEFECTS ON AUTOMATA PROCESSOR Public/Granted day:2019-03-21
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