Invention Grant
- Patent Title: Gate dielectric preserving gate cut process
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Application No.: US15963297Application Date: 2018-04-26
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Publication No.: US10699940B2Publication Date: 2020-06-30
- Inventor: Shu-Yuan Ku , Chih-Ming Sun , Chun-Fai Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L21/762 ; H01L29/40 ; H01L21/3213 ; H01L21/8238 ; H01L29/78 ; H01L21/8234 ; H01L27/088 ; H01L29/66

Abstract:
Gate cutting techniques for integrated circuit devices, particularly for fin-like field effect transistor devices, are disclosed herein. An exemplary method includes receiving an integrated circuit device that includes a gate structure and performing a gate cut process to separate the gate structure into a first gate structure and a second gate structure. The gate cut process includes selectively removing a portion of the gate structure, such that a residual gate dielectric layer extends between the first gate structure and the second gate structure. In some implementations, the residual gate dielectric includes a high-k dielectric material. The method further includes forming a gate isolation region between the first gate structure and the second gate structure.
Public/Granted literature
- US20190157135A1 Gate Dielectric Preserving Gate Cut Process Public/Granted day:2019-05-23
Information query
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