- Patent Title: Method for processing of a further layer on a semiconductor wafer
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Application No.: US16016719Application Date: 2018-06-25
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Publication No.: US10699971B2Publication Date: 2020-06-30
- Inventor: Boris Habets , Martin Roessiger , Stefan Buhl
- Applicant: Qoniac GmbH
- Applicant Address: DE Dresden
- Assignee: Qoniac GmbH
- Current Assignee: Qoniac GmbH
- Current Assignee Address: DE Dresden
- Agency: Hodgson Russ LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/66 ; H01L21/027 ; G03F7/20

Abstract:
An apparatus and a method for analysis of processing of a semiconductor wafer is disclosed which comprises gathering a plurality of items of processing data, applying at least one process model to the at least some of the plurality of items of processing data to derive at least one set of process results, comparing at least some of the derived sets of process results or at least some of the plurality of items of processing data with a process window, and outputting a set of comparison results based on the comparison of the derived sets of process results or the plurality of items of processing data with the process window.
Public/Granted literature
- US20180342429A1 METHOD FOR ASSESSING THE USABILITY OF AN EXPOSED AND DEVELOPED SEMICONDUCTOR WAFER Public/Granted day:2018-11-29
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