A semiconductor structure includes a substrate, a plurality of fins disposed over a top surface of the substrate, and a gate stack surrounding a portion of sidewalls of the plurality of fins. The plurality of fins include two or more active device fins comprising a semiconducting material providing vertical transport channels for respective vertical transport field-effect transistors, and two or more edge fins surrounding the two or more active device fins, the two or more edge fins comprising a dielectric material. Thicknesses of one or more layers of the gate stack surrounding the portion of the sidewalls of the two or more edge fins are different than thicknesses of the one or more layers of the gate stack surrounding the portion of the sidewalls of the active device fins. The vertical transport field-effect transistors provided by the active device fins have uniform threshold voltage.