Invention Grant
- Patent Title: Bidirectional level translator having noise reduction and improved data rate
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Application No.: US16213230Application Date: 2018-12-07
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Publication No.: US10700684B1Publication Date: 2020-06-30
- Inventor: Amar Kanteti , Ankur Kumar Singh
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K19/003
- IPC: H03K19/003 ; H03K3/356 ; H03K3/013 ; H03K3/012 ; H03K19/0185

Abstract:
A level translator translates signals between first and second voltage domains. An output buffer thereof includes a plurality of PFETs coupled in parallel between a second domain's output supply voltage and an output signal and a plurality of NFETs coupled in parallel between the output signal and the ground rail. Each gate of the plurality of PFETs is coupled to a respective first resistor; the first resistors are coupled in series and receive a first gate control signal. Each gate of the plurality of NFETs is coupled to a respective second resistor; the second resistors are coupled in series and receive a second gate control signal. A first booster NFET is coupled between the output supply voltage and the output signal and a second booster NFET is coupled between the output signal and the ground rail. The booster NFETs receive control signals that operate in the first voltage domain.
Public/Granted literature
- US20200186148A1 BIDIRECTIONAL LEVEL TRANSLATOR HAVING NOISE REDUCTION AND IMPROVED DATA RATE Public/Granted day:2020-06-11
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