Invention Grant
- Patent Title: Content addressable memory
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Application No.: US15916016Application Date: 2018-03-08
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Publication No.: US10705143B2Publication Date: 2020-07-07
- Inventor: Makoto Yabuuchi , Shinji Tanaka
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@6646257f
- Main IPC: G01R31/00
- IPC: G01R31/00 ; G01R31/3177 ; G11C15/04 ; G06F11/27 ; G06F11/00 ; G11C29/12

Abstract:
An object of the present invention is to provide a highly-reliable content addressable memory. Provided is a content addressable memory including: a plurality of CAM cells; a word line joined to the CAM cells; a plurality of bit lines joined to the CAM cells; a plurality of search lines joined to the CAM cells; a match line joined to the CAM cells; a match amplifier joined to the match line; and a selection circuit that can select the output of the match amplifier in accordance with the value of the word line.
Public/Granted literature
- US20180340978A1 CONTENT ADDRESSABLE MEMORY Public/Granted day:2018-11-29
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