- Patent Title: Estimation of effective channel length for FinFETs and nano-wires
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Application No.: US16568157Application Date: 2019-09-11
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Publication No.: US10706209B2Publication Date: 2020-07-07
- Inventor: Victor Moroz , Yong-Seog Oh , Stephen Lee Smith , Michael C. Shaughnessy-Culver , Jie Liu
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Haynes Beffel & Wolfeld LLP
- Agent Andrew L. Dunlap; Warren S. Wolfeld
- Main IPC: G06F30/398
- IPC: G06F30/398 ; G06F30/20 ; G06F30/36 ; G06F30/367 ; H01L29/66 ; H01L29/78

Abstract:
Roughly described, a system for estimating an effective channel length of a 3D transistor having a gate length below 20 nm involves estimating an effective volume of the channel and a cross-sectional area of the channel, and estimating the effective channel length as the ratio of effective volume to cross-sectional area. Preferably the effective volume is estimated as the sum of the Voronoi volumes within containing boundaries of the channel, excluding those volumes having a dopant concentration above the source/drain dopant concentration at the carrier injection point. The containing boundaries can be identified using geometry data describing the transistor, particularly the data identifying inner surfaces of the gate dielectric. The estimated effective channel length can be used in TCAD level analysis of the transistor and calculating characteristics of the transistor as needed for circuit simulation.
Public/Granted literature
- US20200004922A1 Estimation of Effective Channel Length for FinFets and Nano-Wires Public/Granted day:2020-01-02
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