Memory device, memory system, and method of operating memory device
Abstract:
Provided herein may be a memory device, a memory system, and a method of operating the memory device. When all of normal operation loops associated with a program operation or an erase operation of a memory cell fail, a retry operation of repeating at least one of the normal operation loops is performed in consideration of the degraded state of at least one of a source select transistor, a drain select transistor, and a dummy cell.
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