FinFET structures and fabrication methods thereof are provided. An exemplary fabrication method includes forming a semiconductor substrate and a plurality of fins. First trenches and second trenches are formed between adjacent fins, and a width of the first trench is greater than a width of the second trench. The method also includes forming a first isolation layer on the semiconductor substrate exposed by the fins and on side surfaces of the fins. The first isolation layer containing an opening at the first trench. Further, the method also includes performing a first thermal annealing; forming a second isolation layer to fill the opening; removing a partial thickness of the first isolation layer and a partial thickness of the second layer to form an isolation structure; forming a gate structure across the plurality of fins; and forming doped source/drain regions in the fins at two sides of the gate structure.