Invention Grant
- Patent Title: Method for fabricating semiconductor device using a porosity in a sacrificial pattern, and fabricating equipment for semiconductor device using the same
-
Application No.: US16216451Application Date: 2018-12-11
-
Publication No.: US10707232B2Publication Date: 2020-07-07
- Inventor: Gyeong Hee Lee , Jun Yeong Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1cd3dc60 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@71f41641
- Main IPC: H01L21/77
- IPC: H01L21/77 ; H01L27/11582 ; H01L27/1157 ; H01L21/02 ; B05C5/02 ; H01L21/311 ; H01L21/3213 ; H01L21/3105 ; H01L21/28

Abstract:
A method for fabricating a semiconductor device, including forming a lower structure on a substrate. The lower structure includes a first sacrificial layer and a first insulating layer alternately and repeatedly stacked. A first hole is formed in the lower substrate. The first hole exposes an upper surface of the substrate. A sacrificial pattern is formed in the first hole. A porosity of the sacrificial pattern increases toward the substrate. An upper structure is formed on the lower structure and the sacrificial pattern. The upper structure includes a second sacrificial layer and a second insulating layer alternatively and repeatedly stacked. A second hole is formed in the upper structure. The second hole exposes the sacrificial pattern. The sacrificial pattern is removed.
Information query
IPC分类: