MOS power transistors in parallel channel configuration
Abstract:
A circuit comprises a first metal-oxide semiconductor, MOS, power transistor having a first gate terminal, a first drain terminal, and a first source terminal, a second MOS power transistor having a second gate terminal, a second drain terminal, and a second source terminal, and a switch connected in-between the first gate terminal and the second gate terminal and configured to selectively couple the first gate terminal and the second gate terminal.
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