Invention Grant
- Patent Title: Adaptive computer cache architecture
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Application No.: US15894164Application Date: 2018-02-12
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Publication No.: US10713165B2Publication Date: 2020-07-14
- Inventor: Jason Lowe-Power , David A. Wood , Mark D. Hill
- Applicant: Wisconsin Alumni Research Foundation
- Applicant Address: US WI Madison
- Assignee: WISCONSIN ALUMNI RESEARCH FOUNDATION
- Current Assignee: WISCONSIN ALUMNI RESEARCH FOUNDATION
- Current Assignee Address: US WI Madison
- Agency: Boyle Fredrickson, S.C.
- Main IPC: G06F12/0804
- IPC: G06F12/0804

Abstract:
A high-bandwidth adaptive cache reduces unnecessary cache accesses by providing a laundry counter indicating whether a given adaptive cache region has any dirty frames to allow write-back without a preparatory adaptive cache read. An optional laundry list allows the preparatory adaptive cache read to also be avoided if the tags of the data being written back match all tags of the data in the adaptive cache that is dirty.
Public/Granted literature
- US20190251026A1 Adaptive Computer Cache Architecture Public/Granted day:2019-08-15
Information query
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