High bandwidth soundwire master with multiple primary data lanes
Abstract:
System, methods and apparatus are described that can improve available bandwidth on a SoundWire bus without increasing the number of pins used by the SoundWire bus. A method performed at a master device coupled to a SoundWire bus includes providing a clock signal by a first master device over a clock line of a SoundWire bus to a first slave device and a second slave device coupled to the SoundWire bus, transmitting first control information from the first master device to the first slave device over a first data line of the SoundWire bus, and transmitting second control information from the first master device to the second slave device over a second data line of the SoundWire bus. The first control information may be different from the second control information and is transmitted concurrently with the second control information.
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