Neuromorphic memory circuit
Abstract:
A neuromorphic memory circuit including a programmable resistive memory element, an axon LIF pulse generator to generate an axon LIF pulse, a back propagation pulse generator to generate a back propagation pulse, a postsynaptic capacitor configured to build up a forward propagation LIF charge over time, and a presynaptic capacitor configured to build up a back propagation LIF charge over time. A first transistor activates a first discharge path from the postsynaptic capacitor through the programmable resistive memory element when the axon LIF pulse generator generates the axon LIF pulse. A second transistor activates a second discharge path from the presynaptic capacitor through the programmable resistive memory element when the back propagation pulse generator generates the back propagation pulse.
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