Gate driver on array circuit
Abstract:
A GOA circuit uses the high voltage level of a high-frequency clock signal for pulling up the voltage level of a second node during the period of outputting a scan signal, to make the voltage level of the second node be larger than the voltage level of a stage transmitting signal of the (n−4)th stage of GOA unit, thereby to keep the pull-up controlling module in off state during the period of outputting the scan signal, for promoting the stability of the GOA circuit and preventing the GOA circuit from malfunction.
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