A display driver includes a driving circuit, a first switch signal output circuit that outputs a first switch signal group to one end of a switch signal line group coupled to first to N-th demultiplexers, and a second switch signal output circuit that outputs a second switch signal group to the other end of the switch signal line group. The first switch signal output circuit sets an output terminal group of the first switch signal group to a high impedance state in a transition period of a voltage level of a switch signal.