A memory system includes: a memory device suitable for storing a data; a controller suitable for controlling an operation of the memory device based on a control signal; and an interface device includes a signal transfer device suitable for transferring the control signal from the controller to the memory device and transferring the data between the memory device and the controller; and a signal control device suitable for controlling an operation of the signal transfer device in response to an interface control signal included in the control signal, wherein the interface control signal includes a blocking command for stopping an operation of the signal transfer device, a correction command for correcting a duty cycle of the control signal, and an unblocking command for resuming the operation in response to the corrected control signal, of the signal transfer device.