A page buffer circuit includes a latch circuit that temporarily stores data when data is written in or read out from a memory cell through a bit line, the page buffer circuit is configured using a switched capacitor circuit. The page buffer circuit includes a first capacitor connected to a sense terminal connected to one end of the latch circuit, a second capacitor connected to the bit line, a first switch interposed between the sense terminal and the second capacitor, a second switch interposed between the sense terminal and a supply voltage, a first transistor including a control terminal and a first element terminal connected to both terminals of the first switch in parallel, a second transistor including first and second element terminals connected between a second element terminal of the first transistor and a ground, and a control circuit controlling the first and second switches and the second transistor.