Provided is a memory device including a substrate, a stack layer, a channel structure, a charge storage structure, a silicon nitride layer, and a buffer oxide layer. The stack layer is disposed over the substrate. The stack layer includes a plurality of dielectric layers and a plurality of conductive layers stacked alternately. The channel structure penetrates through the stack layer. The charge storage structure surrounds a sidewall of the channel structure. The silicon nitride layer surrounds the conductive layers. The buffer oxide layer is disposed between the conductive layers and the silicon nitride layer.