Invention Grant
- Patent Title: MOS transistor with reduced hump effect
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Application No.: US16037095Application Date: 2018-07-17
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Publication No.: US10714583B2Publication Date: 2020-07-14
- Inventor: Christian Rivero , Guilhem Bouton , Pascal Fornara , Julien Delalleau
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Crowe & Dunlevy
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1fce98a7
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/49 ; H01L29/78 ; H01L29/06 ; H01L29/08 ; H01L21/28 ; H01L21/8234

Abstract:
A MOS transistor is produced on and in an active zone which includes a source region and a drain region. The active zone is surrounded by an insulating region. A conductive gate region of the transistor has two flanks which extend transversely to a source-drain direction, and the conductive gate region overlaps two opposite edges of the active zone act overlap zones. The conductive gate region includes, at a location of at least one overlap zone, at least one conductive tag which projects from at least one flank at a foot of the conductive gate region. The conductive tag covers a part of the active zone and a part of the insulating region.
Public/Granted literature
- US20190027565A1 MOS TRANSISTOR WITH REDUCED HUMP EFFECT Public/Granted day:2019-01-24
Information query
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