A pixel array substrate including pixel units is provided. Each of the pixel units includes a thin film transistor, a first insulating layer disposed on the thin film transistor, a common electrode disposed on the first insulating layer, a second insulating layer covering the common electrode, and a pixel electrode disposed on the second insulating layer. The first insulating layer includes a first via. The common electrode includes an opening and connects to the first via. The second insulating layer includes a second via and connects to the opening and the first via. The pixel electrode connects to the thin film transistor through the second via, the opening and the first via. The first via has two first sides opposite to each other and the opening has two third sides opposite to each other are aligned. A fourth side of the opening is not connected to the first via and the second via.