Aspects of the disclosure provide a solid state device that includes a non-volatile memory and a controller. The controller includes a processor, a memory, and a direct memory access (DMA) circuitry. The memory comprises a plurality of addresses. The DMA circuitry is configured to receive a first read request for data stored at a first address of the memory; determine whether the first address is an address from the plurality of addresses; when the first address is amongst the plurality of addresses, provide a first response comprising a particular data, without retrieving data stored at the first address; and when the first address is not amongst the plurality of addresses, retrieve the data stored at the first address, and provide a first response comprising the data retrieved from the first address.