A semiconductor memory device according to an embodiment includes a memory cell array having plural memory cells that can be set to any one of plural different threshold voltages, plural bit lines connected to the plural memory cells respectively, a word line connected to gates of the plural memory cells, a control unit configured to execute a write sequence for repetitively performing plural loops including a set of a program operation of writing data into the memory cells and a verify operation of verifying data written in the memory cells to write predetermined data in the memory cells MT, and prior to execution of the write sequence, the control unit corrects the write sequence based on a result of performing the preliminary program operation and the detection verify operation on the memory cells.