Methods and apparatus for writing nonvolatile 3D NAND flash memory using multiple-page programming. A method is provided for multiple-page programming of an array having a block that includes page groups and each page group includes cell strings that form pages. The method includes deactivating drain select gates (DSGs) and source select gates (SSG), applying a programming voltage to a selected word line, and applying a middle high voltage to unselected word lines. The method also includes repeating multiple programming operations while maintaining the word line voltage levels from a first programming operation to a last programming operation. Each programming operation includes loading data onto bit lines and pulsing a drain select gate associated with a selected page group to load the data into a selected page of the selected page group.