The present disclosure is directed to resistive random access memory (RRAM) structures with a bottom electrode barrier stack. For example, the RRAM structure includes: (i) a bottom electrode having a conductive material and a layer stack, where the layer stack covers a bottom surface and a side surface of the conductive material and is interposed between the conductive material and an underlying conductive structure; (ii) a resistance-switching layer that is disposed on the bottom electrode and opposite to the conductive structure; and (iii) a top electrode that is disposed on the resistance-switching layer.