Invention Grant
- Patent Title: Dual inline memory provisioning and reliability, availability, and serviceability enablement based on post package repair history
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Application No.: US16175555Application Date: 2018-10-30
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Publication No.: US10725671B2Publication Date: 2020-07-28
- Inventor: Amit Sumanlal Shah , Ananya Mukherjee , Mark Lawrence Farley , Vadhiraj Sankaranarayanan
- Applicant: Dell Products L.P.
- Applicant Address: US TX Round Rock
- Assignee: Dell Products L.P.
- Current Assignee: Dell Products L.P.
- Current Assignee Address: US TX Round Rock
- Agency: Baker Botts L.L.P.
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28 ; G06F3/06 ; G06F9/4401

Abstract:
An information handling system for DIMM provisioning and RAS enablement may include a memory subsystem that may comprise a DIMM including a set of ranks, each rank of the set of ranks may include a set of DRAMs, each DRAM of the set of DRAMs including a set of rows, and a non-volatile memory associated with the DIMM. The DIMM may include a post package repair (PPR) history including a set of PPR history entries. Each PPR history entry of the set of PPR history entries may include a failed row count for each rank of a corresponding DRAM of the DIMM. The information handling system may also include a BIOS that may determine whether health of the DIMM is unhealthy that may be based on the PPR history. When the health of the DIMM may be unhealthy, the BIOS may also perform a PPR corrective action procedure.
Public/Granted literature
Information query