Invention Grant
- Patent Title: Splitting load hit store table for out-of-order processor
-
Application No.: US16179245Application Date: 2018-11-02
-
Publication No.: US10725783B2Publication Date: 2020-07-28
- Inventor: Ehsan Fatehi , Richard J. Eickemeyer , Edmund J. Gieske
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Bryan Bortnick
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30

Abstract:
According to one or more embodiments, an example computer-implemented method for executing one or more out-of-order instructions by a processing unit, includes decoding an instruction to be executed, and based on a determination that the instruction is a store instruction, identifying a split load-hit-store (LHS) table for the store instruction, wherein a LHS table of the processing unit includes multiple split LHS tables. Identifying the split LHS table includes determining, for the store instruction, a first split LHS table by performing a mod operation using one or more operands from the store instruction, and adding one or more parameters of the store instruction in the first split LHS table by generating an ITAG for the store instruction. The method further includes dispatching the store instruction for execution to an issue queue with the ITAG.
Public/Granted literature
- US20200142702A1 SPLITTING LOAD HIT STORE TABLE FOR OUT-OF-ORDER PROCESSOR Public/Granted day:2020-05-07
Information query