Invention Grant
- Patent Title: Lockstep processing systems and methods
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Application No.: US15995469Application Date: 2018-06-01
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Publication No.: US10725873B2Publication Date: 2020-07-28
- Inventor: Milosch Meriac , Shidhartha Das
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Leveque IP Law, P.C.
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/16 ; G06F1/12

Abstract:
The present techniques generally relate to a method of monitoring for a fault event in a lockstep processing system having a plurality of cores configured to operate in lockstep, the method having: power gating, for a period of time, a subset of cores of the plurality of cores from a first power source and providing power to the subset of cores from a second power source for the period of time; processing, at each of the cores of the plurality of cores, one or more instructions; providing an output from each core of the plurality of cores to error detection circuitry to monitor for the fault event, the output from each core based on or in response to processing the one or more instructions during the period of time.
Public/Granted literature
- US20190370130A1 LOCKSTEP PROCESSING SYSTEMS AND METHODS Public/Granted day:2019-12-05
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