The present invention relates to “an Innovative Semiconductor Fab's Defect Operating System” thereof for design house and manufacturing Fab is provided. The Innovative Semiconductor Fab's Defect Operating System comprises: receiving pluralities of defect data, IC design layout data; analyzing the defect data, design layouts, by a Critical Area Analysis (CAA) method via a Defect Operating System located inside the Fab site; identify a killer or non-killer defect based on the open or short failure probability; sending the killer defect data to the design house via internet, FTP, etc. The design house receives the wafer testing yield data; pick the bad die information and the killer defect information for failure analysis; correlate the corresponding defect data with the wafer test data; sending the failure killer defect data to the Fab via internet, FTP, etc.; and improve the wafer yield through feed forward defect data and feedback of failure killer defect data which is an innovative “Defect Operation Platform” implementation between design house and Fab.