Array substrate and array substrate testing structure
Abstract:
An array substrate and an array substrate testing structure are provided. The array substrate includes a display region and a non-display region, a plurality of receiving test signal pins, a plurality of bonding pins and a plurality of transmission lines are positioned on the non-display region, the receiving test signal pins and the transmission lines are arranged in row. This invention decreases width of non-display region of electrical device such that easily to design the narrow frame.
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