Invention Grant
- Patent Title: Non-volatile memory cell, array and fabrication method
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Application No.: US16199184Application Date: 2018-11-25
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Publication No.: US10726894B2Publication Date: 2020-07-28
- Inventor: Geeng-Chuan Chern
- Applicant: NEXCHIP SEMICONDUCTOR CO., LTD
- Applicant Address: CN Xinzhan District, Hefei, Anhui
- Assignee: Nexchip Semiconductor Co., Ltd
- Current Assignee: Nexchip Semiconductor Co., Ltd
- Current Assignee Address: CN Xinzhan District, Hefei, Anhui
- Agency: Global IP Services
- Agent Tianhua Gu
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C11/16 ; H01L27/11517 ; H01L21/8234 ; G11C8/14 ; G11C29/00

Abstract:
The present invention provides a non-volatile memory cell, array and fabrication method. The memory cell comprises a substrate, a gate structure, a source region and a drain region, wherein the gate structure is formed on the substrate, the gate structure sequentially comprises a first gate dielectric layer, a first conductive layer, a second gate dielectric layer and a second conductive layer from bottom to top, the source region is formed in the substrate, the source region comprises an N-type heavily doped source region, the drain region is formed in the substrate, the drain region comprises an N-type doped drain region and a P-type heavily doped drain region formed in the N-type doped drain region. The non-volatile memory cell and array provided by the present invention have a band-to-band tunneling programming ability and reserve the advantage of high reading current of an N-channel at the same time.
Public/Granted literature
- US20200027492A1 NON-VOLATILE MEMORY CELL, ARRAY AND FABRICATION METHOD Public/Granted day:2020-01-23
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